Apr
13
Paper available at IEEE Latin American Transactions
April 13, 2024 | Comments Off on Paper available at IEEE Latin American Transactions
The paper entitled “A Proposal of an ECC-based Adaptive Fault-Tolerant Mechanism for 16-bit data words”, written by J. Gracia-Morán (ORCID), L. J. Saiz-Adalid (ORCID), J. C. Baraza-Calvo (ORCID), D. Gil-Tomás (ORCID) and P. J. Gil-Vicente (ORCID), can be accessed at IEEE Latin American Transactions. Video abstract here. Graphical abstract: Abstract Actual memory systems provide large […]
Mar
7
Paper accepted at IEEE Latin American Transactions
March 7, 2024 | Comments Off on Paper accepted at IEEE Latin American Transactions
The paper entitled “A Proposal of an ECC-based Adaptive Fault-Tolerant Mechanism for 16-bit data words”, written by J. Gracia-Morán (ORCID), L. J. Saiz-Adalid (ORCID), J. C. Baraza-Calvo (ORCID), D. Gil-Tomás (ORCID) and P. J. Gil-Vicente (ORCID), has been accepted at IEEE Latin American Transactions. Video Summary here Abstract Actual memory systems provide large storage capacity […]
Mar
6
Paper awarded at ITACA Institute
March 6, 2023 | Comments Off on Paper awarded at ITACA Institute
The paper entitled «A Multi-criteria Analysis of Benchmark Results With Expert Support for Security Tools» written by Miquel Martínez, Juan-Carlos Ruiz, Nuno Antunes, David de Andrés and Marco Vieira, and publised at IEEE Transactions on Dependable and Secure Computing journal has been awarded by the ITACA Institute. Abstract. The benchmarking of security tools is endeavored […]
Jul
15
Paper published at IEEE Transactions on Dependable and Secure Computing (TDSC)
July 15, 2022 | Comments Off on Paper published at IEEE Transactions on Dependable and Secure Computing (TDSC)
The paper entitled “A Multi-Criteria Analysis of Benchmark Results With Expert Support for Security Tools” authored by Miquel Martínez, Juan-Carlos Ruiz, Nuno Antunes, David de Andrés, and Marco Vieira is availabe at IEEE Explore. Abstract The benchmarking of security tools is endeavoured to determine which tools are more suitable to detect system vulnerabilities or intrusions. […]
Oct
19
New paper at IEEE Latin American Transactions
October 19, 2021 | Comments Off on New paper at IEEE Latin American Transactions
The paper entitled “Design, Implementation and Evaluation of a Low Redundant Error Correction Code”, written by J. Gracia-Morán, L.J. Saiz-Adalid, J.C. Baraza-Calvo, D. Gil-Tomás and P.J. Gil-Vicente is availabe here. DOI: 10.1109/TLA.2021.9475624 Abstract The continuous incrementin the integration scale of CMOS technology has provoked an augment in the fault rate. Particularly, a single particle hit […]