Paper accepted at SAFECOMP 2024

April 22, 2024 | Comments Off on Paper accepted at SAFECOMP 2024

The paper entitled “In-Memory Zero-Space Floating-Point-based CNN protection using non-significant and invariant bits”, and written by Juan Carlos Ruiz Garcia, Luis Jose Saiz-Adalid, David de Andrés Martínez, and Joaquín Gracia-Morán has been accepted at SAFECOMP 2024. Abstract Convolutional Neural Networks (CNNs) have accomplished significant success in various domains, including transportation, health care and banking. Millions […]

Paper accepted at Jornadas SARTECO 2024 (III)

April 15, 2024 | Comments Off on Paper accepted at Jornadas SARTECO 2024 (III)

The paper entitled “Tolerancia a fallos múltiples en redes convolucionales en coma flotante de 16 bitsutilizando códigos correctores de errores” written by J.C. Ruiz-García, D. Andrés-Martínez, L.J. Saiz-Adalid, and J. Gracia-Morán has been accepted at Jornadas SARTECO 2024. Abstract Multitud de sistemas utilizan redes convolucionales para identificar objetos en las imágenes que analizan. Este análisis […]

Paper accepted at Jornadas SARTECO 2024 (II)

April 15, 2024 | Comments Off on Paper accepted at Jornadas SARTECO 2024 (II)

The paper entitled “Estudio de la confiabilidad de una red neuronal convolucional cuantizada” written by J. Gracia-Morán, L.J. Saiz-Adalid, J.C. Ruiz-García, and D. Andrés-Martínez has been accepted at Jornadas SARTECO 2024. Abstract A medida que el uso de las redes neuronales se generaliza, el interés por su confiabilidad también aumenta. En concreto, las redes neuronales […]

Paper accepted at Jornadas SARTECO 2024 (I)

April 15, 2024 | Comments Off on Paper accepted at Jornadas SARTECO 2024 (I)

The paper entitled “Protección mediante Códigos de Corrección de Errores de los pesos de una Red Neuronal implementada en Arduino” written by J. Gracia-Morán and L.J. Saiz-Adalid has been accepted at Jornadas SARTECO 2024. Abstract Últimamente, el amplio uso de las redes neuronales ha provocado que éstas estén presentes en multitud de entornos, como pueden […]

Paper available at IEEE Latin American Transactions

April 13, 2024 | Comments Off on Paper available at IEEE Latin American Transactions

The paper entitled “A Proposal of an ECC-based Adaptive Fault-Tolerant Mechanism for 16-bit data words”, written by J. Gracia-Morán (ORCID), L. J. Saiz-Adalid (ORCID), J. C. Baraza-Calvo (ORCID), D. Gil-Tomás (ORCID) and P. J. Gil-Vicente (ORCID), can be accessed at IEEE Latin American Transactions. Video abstract here. Graphical abstract: Abstract Actual memory systems provide large […]