Jun
29
Paper accepted at ITACA-WIICT 2022 (II)
June 29, 2022 | | Comments Off on Paper accepted at ITACA-WIICT 2022 (II)
The paper entitled “Analysis of overheads caused by adding Error Correction Codes in Embedded Systems”, authored by J. Gracia-Morán, P.Martín-Tabares, C. Martínez-Ruiz and L.J. Saiz-Adalid has been accepted at IX Workshop on Innovation on Information and Communication Technologies (ITACA-WIICT 2022).
Abstract
Nowadays, CMOS technology integration scale has allowed memory systems with a large storage capacity. However, it has also caused an increase in its fault rate.
One possible solution is the use of Error Correction Codes (ECCs). New ECCs are continually being proposed. These proposals consider a multitude of factors, such as redundancy, or different overheads introduced by the ECCs. However, these ECCs are typically designed for large memory systems, whereas few studies have been done analyzing how affects the inclusion of an ECC in an Embedded System. In this work, we have examined how the insertion of a series of ECCs in an Embedded System affects it.
DEFADAS Project: Grant PID2020-120271RB-I00 funded by MCIN/AEI/10.13039/501100011033
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