May
5
Papers accepted at Jornadas SARTECO 2025
May 5, 2025 | Comments Off on Papers accepted at Jornadas SARTECO 2025
Different papers authored by the GSTF’s members has been accepted at Jornadas SARTECO 2025, that will be held in Sevilla (Spain) next June. Title: Análisis de la confiabilidad de una red neuronal implementada en Arduino con formato BF16Authors: Joaquín Gracia-Morán, David de Andrés, Luis-J. Saiz-Adalid, Juan Carlos Ruiz, J.-Carlos Baraza-Calvo, Daniel Gil-Tomás, Pedro J. Gil-VicenteAbstract: […]
Apr
27
Attendance at the EDCC
April 27, 2025 | Comments Off on Attendance at the EDCC
The ITACA Institute has echoed the attendance of GSTF researchers at EDCC 2025. The complete information can be seen here.
Apr
15
Poster award at EDCC 2025
April 15, 2025 | Comments Off on Poster award at EDCC 2025
The poster entitled “Towards a novel 8-bit floating point format to increase robustness in CNNs”, written by Luis J. Saiz-Adalid, has been awarded as Distinguished Poster at EDCC 2025. Congratulations!!
Apr
14
Participation in the EDCC 2025
April 14, 2025 | Comments Off on Participation in the EDCC 2025
Several members of the group have traveled to Lisbon to participate in EDCC 2025, where they have presented the future work we are doing.
Jun
28
CEDI 2024
June 28, 2024 | Comments Off on CEDI 2024
Juan C. Ruiz, Luis J. Saiz and Joaquín Gracia have attended the CEDI 2024, that was held in A Coruña, Spain. During these days, they have contacted with others researches, exchanging ideas and establishing possible future collaborations
Jun
26
Invited speaker at DNS 2024
June 26, 2024 | Comments Off on Invited speaker at DNS 2024
This June 24, the VERDI workshop (co-located with DSN 2024) was held in Brisbane, Australia. In this workshop, Juan C. Ruiz has been the invited speaker with a talk entitled “On improving the robustness of convolutional neural networks using in-parameter zero-space error correction codes“. The program of VERDI 2024 can be seen here. This talk […]
Jun
26
Presentation at Jornadas SARTECO 2024 (III)
June 26, 2024 | Comments Off on Presentation at Jornadas SARTECO 2024 (III)
J.C. Ruiz-García has presented the paper entitled “Tolerancia a fallos múltiples en redes convolucionales en coma flotante de 16 bits utilizando códigos correctores de errores”, authored by J.C. Ruiz-García, D. de Andrés Martínez, Luis J. Saiz-Adalid and J. Gracia-Morán at Jornadas SARTECO 2024 in A Coruña.
Jun
26
Presentation at Jornadas SARTECO 2024 (II)
June 26, 2024 | Comments Off on Presentation at Jornadas SARTECO 2024 (II)
J. Gracia-Morán has presented the paper entitled “Protección mediante Códigos de Corrección de Errores de los pesos de una Red Neuronal implementada en Arduino”, authored by J. Gracia-Morán and Luis J. Saiz-Adalid at Jornadas SARTECO 2024 in A Coruña.
Jun
18
Presentation at Jornadas SARTECO 2024 (I)
June 18, 2024 | Comments Off on Presentation at Jornadas SARTECO 2024 (I)
Luis J. Saiz-Adalid has presented the paper entitled “Estudio de la confiabilidad de una red neuronal convolucional cuantizada”, authored by J. Gracia-Morán, Luis J. Saiz-Adalid, J.C. Ruiz-García, D. de Andrés Martínez at Jornadas SARTECO 2024 in A Coruña.
Mar
22
Programm Committee Members of the VIII Jornadas de Computación Empotrada y Reconfigurable (JCER’24)
March 22, 2024 | Comments Off on Programm Committee Members of the VIII Jornadas de Computación Empotrada y Reconfigurable (JCER’24)
Joaquín Gracia-Morán and Juan C. Ruiz-García will serve as members of the Programm Committee of the VIII Jornadas de Computación Empotrada y Reconfigurable (JCER’24), that will be held in A Coruña next June.