Jun
28
CEDI 2024
June 28, 2024 | Comments Off on CEDI 2024
Juan C. Ruiz, Luis J. Saiz and Joaquín Gracia have attended the CEDI 2024, that was held in A Coruña, Spain. During these days, they have contacted with others researches, exchanging ideas and establishing possible future collaborations
Jun
26
Invited speaker at DNS 2024
June 26, 2024 | Comments Off on Invited speaker at DNS 2024
This June 24, the VERDI workshop (co-located with DSN 2024) was held in Brisbane, Australia. In this workshop, Juan C. Ruiz has been the invited speaker with a talk entitled “On improving the robustness of convolutional neural networks using in-parameter zero-space error correction codes“. The program of VERDI 2024 can be seen here. This talk […]
Jun
26
Presentation at Jornadas SARTECO 2024 (III)
June 26, 2024 | Comments Off on Presentation at Jornadas SARTECO 2024 (III)
J.C. Ruiz-García has presented the paper entitled “Tolerancia a fallos múltiples en redes convolucionales en coma flotante de 16 bits utilizando códigos correctores de errores”, authored by J.C. Ruiz-García, D. de Andrés Martínez, Luis J. Saiz-Adalid and J. Gracia-Morán at Jornadas SARTECO 2024 in A Coruña.
Jun
26
Presentation at Jornadas SARTECO 2024 (II)
June 26, 2024 | Comments Off on Presentation at Jornadas SARTECO 2024 (II)
J. Gracia-Morán has presented the paper entitled “Protección mediante Códigos de Corrección de Errores de los pesos de una Red Neuronal implementada en Arduino”, authored by J. Gracia-Morán and Luis J. Saiz-Adalid at Jornadas SARTECO 2024 in A Coruña.
Jun
18
Presentation at Jornadas SARTECO 2024 (I)
June 18, 2024 | Comments Off on Presentation at Jornadas SARTECO 2024 (I)
Luis J. Saiz-Adalid has presented the paper entitled “Estudio de la confiabilidad de una red neuronal convolucional cuantizada”, authored by J. Gracia-Morán, Luis J. Saiz-Adalid, J.C. Ruiz-García, D. de Andrés Martínez at Jornadas SARTECO 2024 in A Coruña.
Mar
22
Programm Committee Members of the VIII Jornadas de Computación Empotrada y Reconfigurable (JCER’24)
March 22, 2024 | Comments Off on Programm Committee Members of the VIII Jornadas de Computación Empotrada y Reconfigurable (JCER’24)
Joaquín Gracia-Morán and Juan C. Ruiz-García will serve as members of the Programm Committee of the VIII Jornadas de Computación Empotrada y Reconfigurable (JCER’24), that will be held in A Coruña next June.
Mar
6
9th International Workshop on Safety and Security of Intelligent Vehicles
March 6, 2023 | Comments Off on 9th International Workshop on Safety and Security of Intelligent Vehicles
David de Andrés is part of the Programm Committee of the 9th International Workshop on Safety and Security of Intelligent Vehicles. This workshop, co-located with DSN 2023, will be celebrated in Porto (Portugal), June 26, 2023.
Oct
4
Keynote speech at EDCC 2022
October 4, 2022 | Comments Off on Keynote speech at EDCC 2022
Juan Carlos Ruiz-García has given the Keynote Speech entitled “Reconfigurable logic for automotive edge computing: from promises to dependability assessment challenges” inside the Critical Automotive applications: Robustness & Safety (CARS) workshop, at EDCC 2022.
Sep
28
Session chair at Jornadas SARTECO 2022
September 28, 2022 | Comments Off on Session chair at Jornadas SARTECO 2022
Last wednesday (September 21st), Joaquín Gracia-Moran has chaired the Fault Tolerant Session at Jornadas SARTECO. Papers included were: “Estudio académico de la Fiabilidad de diferentes propuestas de Tolerancia a Fallos para el desarrollo de prácticas docentes”, Rafael Ayllón Gavilán, José Manuel Palomares Muñoz and Joaquín Olivares“Simulador Web de Sistemas Tolerantes a Fallos”, Antonio Gómez López, […]
Sep
5
Keynote speech at EDCC 2022
September 5, 2022 | Comments Off on Keynote speech at EDCC 2022
Juan Carlos Ruiz-García has been invited by the EDCC 2022 Steering Committe to give a Keynote Speech entitled “Reconfigurable logic for automotive edge computing: from promises to dependability assessment challenges”, inside the Critical Automotive applications: Robustness & Safety (CARS) workshop. Abstract: Reconfigurable logic devices have provided means to meet the requirements of evolution existing in […]