May
23
Paper available at IEEE early access
May 23, 2024 | Comments Off on Paper available at IEEE early access
The paper entitled “A Hybrid Technique based on ECC and Hardened Cells for Tolerating Random Multiple-Bit Upsets in SRAM arrays”, written by Daniel Gil-Tomás, Luis J. Saiz-Adalid, Joaquín Gracia-Morán, J. Carlos Baraza-Calvo and Pedro J. Gil-Vicente is now available at IEEE Access. Abstract: MBU is an increasing challenge in SRAM memory, due to the chip’s […]
May
13
Paper accepted at IEEE Access
May 13, 2024 | Comments Off on Paper accepted at IEEE Access
The paper entitled “A Hybrid Technique based on ECC and Hardened Cells for Tolerating Random Multiple-Bit Upsets in SRAM arrays”, written by Daniel Gil-Tomás, Luis J. Saiz-Adalid, Joaquín Gracia-Morán, J. Carlos Baraza-Calvo and Pedro J. Gil-Vicente has been accepted at IEEE Access. Abstract: MBU is an increasing challenge in SRAM memory, due to the chip’s […]
May
13
Teaching at “Máster en Ingeniería de Sistemas Empotrados”
May 13, 2024 | Comments Off on Teaching at “Máster en Ingeniería de Sistemas Empotrados”
From 6 to 10 of May, Joaquín Gracia has taught the course “Fiabilidad en Sistemas Empotrados“, belonging to the “Máster en Ingeniería de Sistemas Empotrados” at UPV/EHU.